1. Field of Invention
This invention relates to programmable integrated circuits, particular to a new architecture that bridges this performance gap, while retaining the flexibility that programmability offers.
2. Description of Related Art
Conventional field programmable gate arrays enable user programming, but are slow due to the delays through the transistors or switches or multiplexers used to program the interconnect between configurable logic elements. Each logic element can be connected to a multitude of other logic elements through switches. Thus, the path from a logic element to the next computing logic element may be strewn with many switches, which slows down circuit operation. Also, some paths in a conventional programmable integrated circuit turn out to be critical and not others, which directly means that a customized circuit which speeds up this path at the expense of other non-critical paths becomes possible, demonstrating the existence of customized implementations that operate faster. Programmable integrated circuits are typically much less dense than custom implementations due to the use of routing channels explicitly for making longer connections, and due to the use of routing matrices, which take up significant area.